1. Field of the Invention
This invention generally relates to semiconductor devices and integrated circuits and fabrication methods therefor, more specifically, this invention relates to an improved zener diode and RC network combination semiconductor device in an integrated circuit and a method for manufacturing such an improved zener diode and RC network combination semiconductor device which provides voltage reference for active and/or passive devices or circuits or any type of integrated circuit.
2. Description of the Related Art
In the prior art, various types of zener diodes and methods for manufacturing zener diodes have resulted in a compromise between accuracy of the voltage reference and complexity of the fabrication process. Buried zener diodes, i.e. the PN junction is below the surface of the substrate, as found for example in U.S. Pat. No. 5,241,213 "Buried Zener Diode Having Auxiliary Zener Junction Access Path". (Hull) proffers to have increased voltage reference accuracy, but certainly at the expense of added complexity.
Another example of a more rudimentary buried zener diode appears in U.S. Pat. No. 4,910,158 "Zener Diode Emulation And Method Of Forming The Same" (Anderson). The Anderson reference discloses a zener diode pair.
The prior art which also includes U.S. Pat. No. 4,853,759 (Haque), U.S. Pat. No. 5,355,014 (Rao et al.), U.S. Pat. No. 5,770,886 (Rao et al.), U.S. Pat. No. 5,218,222 (Roberts), U.S. Pat. No. 5,227,012 (Brandli et al.) and Japanese Document 58-868 (04/1987) H01L27/04, disclose prior configurations. However, none of these prior references disclose the combination of features of the combined semiconductor integrated circuit device of this invention and the fabrication method therefor.
Furthermore, none of the prior art seeks to leverage the advantages of providing a zener diode with an RC network in one integrated circuit using all front side electrical contacts. Therefore a need existed to optimize a semiconductor structure and fabrication technique for providing a zener diode in combination with an RC network in one integrated circuit combination without using the backside of the semiconductor substrate by using the top or front side of the semiconductor substrate to make electrical contact to all of the devices including the active zener diode device, the passive resistor device and the passive capacitor device. This would facilitate use of such a semiconductor structure in a "Flip-Chip" type package or a backside mounted (die bonding) configuration because all of the electrical contacts are made to just one (top or front) side of the semiconductor substrate.